CST334: Operating Systems, Week 4

 Identify the topics we covered in class -- you can start by listing them

1. Free Space Management
2. Translation Lookaside Buffers (TLBs)
3. Multi-level Paging
4. Swapping / Page Fault Handling

Explain what each of the topics were in your own terms -- take the identified topics and add a sentence or two describing them.

Free Space Management

Free space management focuses on how an allocator keeps track of which parts of memory are free or in use, especially when the free space is split into variable-sized pieces. Techniques like splitting and coalescing help reduce external fragmentation so memory can be reused more effectively.

Translation Lookaside Buffers (TLBs)

TLBs are small hardware caches that store recent virtual to physical address translations so the CPU does not need to walk the page table for every memory access. A TLB hit makes translation fast while a miss forces the system to consult the page table before retrying the instruction.

Multi-level Paging

Multi-level paging breaks the page table into smaller chunks and only allocates the parts that contain valid entries. This keeps page tables much smaller for sparse address spaces and avoids wasting memory on large unused regions.

Swapping / Page Fault Handling

Swapping allows the OS to move pages between memory and disk when physical memory is full. When a program accesses a page that is not in memory, the hardware raises a page fault and the OS brings the missing page back before allowing the instruction to continue.

Identify least-understood topics -- of these topics, which was the hardest for you to write the descriptions?

The topic that took the most amount of effort for me was multi-level paging. The high-level purpose made sense right away, but once I tried to mentally follow the exact lookup process across multiple levels, I realized I was focusing more on the idea than the actual step-by-step flow. I had to reread the examples a number of times to understand how the top-level directory decides whether a lower-level table even exists. 

I also found myself mixing up which parts of a page fault handling are the responsibility of the hardware and which are managed entirely by the OS. I need some more practice.

Explain the nature of your confusion -- for these difficult topics, what pieces of them make sense and what pieces are difficult to describe?

With multi-level paging, the hardest part is picturing how a virtual address is broken apart and used across different layers. I can follow the diagram when it is in front of me, but imagining it from memory takes a lot of effort. I think part of the challenge is that I still lean on the simpler model of a single large page table, because it feels more direct even though it wastes too much memory. 

With swapping, the concept is clear, but I am still shaky on some of the smaller details. The idea that PTE stores either the PFN or the location of the page on disk requires me to slow down and think about it. The present bit makes sense.

Identify "aha" moments -- which topic did you find it easiest to write about, and why did it make sense?

My biggest realization this week came from the TLB material. I already knew the TLB made address translation faster, but I had not appreciated how much of a difference locality makes even in simple loops. Seeing how only the first element on each page produced a TLB miss showed me how much work the hardware saves us behind the scenes. It made me more aware of how my own code tends to access memory, even though I usually think about that at a much higher level.

Another moment where things clicked was in the free space management reading. Coalescing made sense in theory, but seeing how easily a system can end up with plenty of total free memory and still be unable to satisfy a request helped me finally understand why fragmentation is a real problem instead of just a theoretical inconvenience.

Ask questions -- what do you think will come next? Are there any gaps that don't seem to be explained yet?

It feels like we are close to talking about page replacement policies, since swapping showed us the mechanics of how pages move to and from disk but not the strategy behind which page should be evicted. I am curious how the OS balances factors like recency, frequency, and fairness, especially when different processes compete for the same physical memory.

I also wonder how multi-level paging interacts with TLB performance. If most accesses are satisfied through the TLB, does the number of page table levels matter more for the rare case where there is a TLB miss? I am interested in how real systems choose their structures, since hardware and OS constraints both seem to play major roles.

What connections did you see to other classes and applications -- have you used/heard/thought about these topics before?

Free space management reminded me of memory handling in C and how allocators work behind the scenes. Multi-level paging brought back tree structures from data structures, since the page directory behaves a lot like a tree with only the needed branches present. The swapping and page fault material tied back to the memory hierarchy from computer architecture, but this time I am seeing the same concepts through the OS lens rather than the hardware side. These overlaps made the topics feel more familiar even though the details were new.